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this is information on a product in full production. december 2013 docid15917 rev 6 1/33 VNL5050N3-E vnl5050s5-e omnifet iii fully protected low-side driver datasheet - production data features ? automotive qualified ? drain current: 19 a ? esd protection ? overvoltage clamp ? thermal shutdown ? current and power limitation ? very low standby current ? very low electromagnetic susceptibility ? compliant with european directive 2002/95/ec ? open drain status output (vnl5050s5-e only) description the VNL5050N3-E and vnl5050s5-e are monolithic devices made using stmicroelectronics vipower ? technology, intended for driving resistive or inductive loads with one side connected to the battery. built-in thermal shutdown protects the chip from overtemperature and short-circuit. output current limitation protects the devices in an overload condition. in case of long duration overload, the devices limit the dissipated power to a safe level up to thermal shutdown intervention.thermal shutdown, with automatic restart, allows the devices to recover normal operation as soon as a fault condition disappears. fast demagnetization of inductive loads is achieved at turn-off. type v clamp r ds(on) i d VNL5050N3-E 41 v 50 m 19 a vnl5050s5-e 1 2 2 3 sot-223 so-8 table 1. devices summary package order codes tube tape and reel sot-223 VNL5050N3-E vnl5050n3tr-e so-8 vnl5050s5-e vnl5050s5tr-e www.st.com
contents VNL5050N3-E, vnl5050s5-e 2/33 docid15917 rev 6 contents 1 block diagrams and pins configurations . . . . . . . . . . . . . . . . . . . . . . . . 5 2 absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.2 mcu i/o protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4 package and pc board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.1 sot-223 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.2 so-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.1 ecopack ? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.2 sot-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.3 so-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.4 sot-223 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.5 so-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
docid15917 rev 6 3/33 VNL5050N3-E, vnl5050s5-e list of tables 3 list of tables table 1. devices summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. suggested connections for unused and n.c. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 4. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 5. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 6. power mos section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 7. source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 8. input section. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 9. status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 10. logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 11. openload detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 12. supply section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 13. switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 14. protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 15. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 table 16. thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 17. thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 18. sot-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 19. so-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 20. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
list of figures VNL5050N3-E, vnl5050s5-e 4/33 docid15917 rev 6 list of figures figure 1. VNL5050N3-E block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. vnl5050s5-e block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 3. VNL5050N3-E current and voltage conventions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 4. vnl5050s5-e current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 5. configuration diagrams (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 6. source diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 7. static drain source on-resistance vs. drain current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 8. static drain source on-resistance vs. input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 9. static drain source on-resistance vs. drain current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 10. transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 11. transfer characteristics (inside view for v in = 2 v to 3 v) . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 12. output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 13. normalized on-resistance vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 14. normalized input threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 15. switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 16. VNL5050N3-E application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 17. vnl5050s5-e application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 18. maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 8 figure 19. sot-223 pc board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 20. rthj-amb vs. pcb copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 19 figure 21. sot-223 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . 20 figure 22. thermal fitting model of a lsd in sot-223 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 23. so-8 pc board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 24. rthj-amb vs. pcb copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 22 figure 25. so-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 26. thermal fitting model of a lsd in so-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 27. sot-223 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 28. so-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 29. sot-223 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 30. so-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 figure 31. so-8 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 0
docid15917 rev 6 5/33 VNL5050N3-E, vnl5050s5-e block diagrams and pins configurations 32 1 block diagrams and pins configurations figure 1. VNL5050N3-E block diagram figure 2. vnl5050s5-e block diagram drain control & diagnostic logic driver current limitation power clamp overtemperature protection overload protection (active power limitation) in gnd drain control & diagnostic logic driver current limitation power clamp off state open load overtemperature protection overload protection (active power limitation) in st gnd supply supply
block diagrams and pins configurations VNL5050N3-E, vnl5050s5-e 6/33 docid15917 rev 6 figure 3. VNL5050N3-E current and voltage conventions figure 4. vnl5050s5-e current and voltage conventions table 2. pin function name function input voltage controlled input pin with hysteresis, cmos compatible. controls output switch state (1) 1. internally connected to v supply in the VNL5050N3-E drain power mos drain source power mos source and ground reference for the control section supply voltage supply voltage connected to the signal part (5 v) status open drain digital diagnostic pin (2) 2. valid for vnl5050s5-e only. */165 %3"*/ 4063$& * % 7 %4 * */ 7 */ ("1($'5 */165 %3"*/ 4063$& * % 7 %4 * */ 7 */ ("1($'5 45"564 4611-: 70-5"(& * 45"5 * 4 7 45"5 7 tvqqmz
docid15917 rev 6 7/33 VNL5050N3-E, vnl5050s5-e block diagrams and pins configurations 32 figure 5. configuration diagrams (top view) table 3. suggested connections for unused and n.c. pins connection / pin status n.c. input floating x x x to ground not allowed x through 10 k resistor */165 4611-:70-5"(& 45"564 /$ 4063$& %3"*/ 4063$& %3"*/ %3"*/ */165 4063$& %3"*/ %3"*/ 405 40 ("1($'5
absolute maximum rating VNL5050N3-E, vnl5050s5-e 8/33 docid15917 rev 6 2 absolute maximum rating stressing the device above the rating listed in the table 4 may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2.1 absolute maximum ratings 2.2 thermal data table 4. absolute maximum ratings symbol parameter value unit sot-223 so-8 v ds drain-source voltage (v in = 0 v) internally clamped v i d dc drain current internally limited a -i d reverse dc drain current 4 a i s dc supply current - -1 to 10 ma i in dc input current -1 to 10 ma i stat dc status current - -1 to 10 ma v esd1 electrostatic discharge (r = 1.5 k ; c = 100 pf) ?drain ? supply, input, status 5000 4000 v v esd2 electrostatic discharge on output pin only (r = 330 , c = 150 pf) 2000 v t j junction operating temperature -40 to 150 c t stg storage temperature -55 to 150 c e as single pulse avalanche energy (l = 1.1 mh, t j = 150 c, r l = 0, i out = i liml ) 93 mj table 5. thermal data symbol parameter maximum value unit sot-223 so-8 r thj-amb thermal resistance junction-ambient 108.3 (1) 1. when mounted on a standard single-sided fr4 board with 0.5 cm 2 of cu (at least 35 m thick) connected to all drain pins 87 c/w
docid15917 rev 6 9/33 VNL5050N3-E, vnl5050s5-e electrical characteristics 32 3 electrical characteristics values specified in this section are for v supply = v in = 4.5 v to 5.5 v, -40 c < t j < 150 c, unless otherwise stated. table 6. power mos section symbol parameter test conditions min. typ. max. unit v supply operating supply voltage - 3.5 5 5.5 v r on on-state resistance i d = 2 a; t j = 25 c, v supply = v in = 5 v 50 m i d = 2 a; t j = 150 c, v supply = v in = 5 v 100 v clamp drain-source clamp voltage v in = 0 v; i d = 2 a 414652 v v clth drain-source clamp threshold voltage v in = 0 v; i d = 2 ma 36 v i dss off-state output current v in = 0 v; v ds = 13 v; t j = 25 c 03 a v in = 0 v; v ds = 13 v; t j = 125 c 05 table 7. source drain diode symbol parameter test conditions min. typ. max. unit v sd forward on voltage i d = 2 a; v in = 0 v - 0.8 - v table 8. input section (1) . 1. valid for VNL5050N3-E option (input and supply pins connected together) symbol parameter test conditions min. typ. max. unit i iss supply current from input pin on-state: v supply = v in = 5 v; v ds = 0 v 30 65 a v icl input clamp voltage i s = 1 ma 5.5 7 v i s = -1 ma -0.7 v inth input threshold voltage v ds = v in ; i d = 1 ma 1 3.5 v table 9. status pin (1) symbol parameter test conditions min. typ. max. unit v stat status low output voltage i stat = 1 ma 0.5 v i lstat status leakage current normal operation; v stat = 5 v 10 a c stat status pin input capacitance normal operation; v stat = 5 v 100 pf
electrical characteristics VNL5050N3-E, vnl5050s5-e 10/33 docid15917 rev 6 v stcl status clamp voltage i stat = 1 ma 5.5 7 v i stat = -1 ma -0.7 1. valid for vnl5050s5-e option table 10. logic input (1) 1. valid for vnl5050s5-e option symbol parameter test conditions min. typ. max. unit v il low-level input voltage ? 0.9 v i il low-level input current v in = 0.9 v 1 a v ih high-level input voltage ? 2.1 v i ih high-level input current v in = 2.1 v 10 a v i(hyst) input hysteresis voltage ? 0.13 v v icl input clamp voltage i in = 1 ma 5.5 7 v i in = -1 ma -0.7 table 11. openload detection (1) 1. valid for vnl5050s5-e option symbol parameter test conditions min. typ. max. unit v ol openload off-state voltage detection threshold v in = 0 v 0.6 1.2 1.7 v t d(oloff) delay between input falling edge and status falling edge in openload condition i out = 0 a 45 425 1100 s table 12. supply section (1) 1. valid for vnl5050s5-e option symbol parameter test conditions min. typ. max. unit i s supply current off-state: t j = 25 c; v in = v drain = 0 v; 10 25 a on-state: t j = 25 c; v in = 5 v; v ds = 0 v 25 65 v scl supply clamp voltage i scl = 1 ma 5.5 7 v i scl = -1 ma -0.7 table 9. status pin (1) (continued) symbol parameter test conditions min. typ. max. unit
docid15917 rev 6 11/33 VNL5050N3-E, vnl5050s5-e electrical characteristics 32 table 13. switching characteristics (1) 1. see figure 16: VNL5050N3-E application schematic and figure 17: vnl5050s5-e application schematic symbol parameter test conditions sot-223 (2) 2. 3.5 v v supply = v in 5.5 v so-8 unit min. typ. max min. typ. max. t d(on) turn-on delay time r l = 6.5 , v cc = 13 v (3) 3. see figure 15: switching characteristics ?6??6 ?s t d(off) turn-off delay time r l = 6.5 , v cc = 13 v ?20??20?s t r rise time r l = 6.5 , v cc = 13 v ?10??10 ?s t f fall time r l = 6.5 , v cc = 13 v ?10??10 ?s w on switching energy losses at turn-on r l = 6.5 , v cc = 13 v ?0.04? ?0.04?mj w off switching energy losses at turn-off r l = 6.5 , v cc = 13 v ?0.06? ?0.06?mj table 14. protection and diagnostics symbol parameter test conditions (1) 1. v supply = v input in VNL5050N3-E version min. typ. max. unit i limh dc short-circuit current v ds = 13 v; v supply = v in = 5 v 19 27 38 a i liml short-circuit current during thermal cycling v ds = 13 v; t r < t j < t tsd; v supply = v in = 5 v 11 a t dliml step response current limit v ds = 13 v; v input = 5 v 44 s t tsd shutdown temperature ? 150 175 200 c t r (2) 2. valid for vnl5050s5-e option reset temperature ? t rs + 1 t rs + 5 c t rs (3) thermal reset of status ?135 c t hyst thermal hysteresis (t tsd - t r ) ?7c
electrical characteristics VNL5050N3-E, vnl5050s5-e 12/33 docid15917 rev 6 3.1 electrical characteristics curves figure 6. source diode forward characteristics figure 7. static drain source on-resistance vs. drain current figure 8. static drain source on-resistance vs. input voltage figure 9. static drain source on-resistance vs. drain current ,g$ 9ip9 ("1($'5 5 21 p? , ' $ $ % & 9 ,1 9 1rwh )nputandsupp lypinsconnectedto gethe r $7 m ?& %7 m ?& &7 m ?& ("1($'5 5 21 p? 9 ,1 9 $ % & , ' $ 1rwh )nputandsupp lypinsconnectedto gethe r $7 m ?& %7 m ?& &7 m ?& ("1($'5 5 '6rq p ? ,g$ $ % & ' ( ) 1rwh )nputandsupp lypinsconnectedto gethe r $9 ,1 97 m ?& %9 ,1 97 m ?& &9 ,1 97 m ?& ("1($'5 '9 ,1 97 m ?& (9 ,1 97 m ?& )9 ,1 97 m ?&
docid15917 rev 6 13/33 VNL5050N3-E, vnl5050s5-e electrical characteristics 32 figure 10. transfer characteristics figure 11. transfer characteristics (inside view for v in = 2 v to 3 v) figure 12. output characteristics figure 13. normalized on-resistance vs. temperature , ' $ 9 ,1 9 $ $ % % & & 9 '6 9 1rwh )nputandsupp lypinsconnectedto gethe r $7 m ?& %7 m ?& &7 m ?& ("1($'5 , ' p$ 9 ,1 9 $ % & 9 '6 9 1rwh )nputandsupp lypinsconnectedto gethe r $7 m ?& %7 m ?& &7 m ?& ("1($'5 , ' $ 9 '6 9 $ % & 1rwh )nputandsupp lypinsconnectedto gethe r $7 m ?& %7 m ?& &7 m ?& ("1($'5 5rqp? 7m?& ,rxw $ ("1($'5
electrical characteristics VNL5050N3-E, vnl5050s5-e 14/33 docid15917 rev 6 figure 14. normalized input threshold vs. temperature 9lqwk9 7m?& ,g p$ 1rwh ,qsxwdqgvxsso\slqv frqqhfwhgwrjhwkhu ("1($'5 table 15. truth table (1) 1. valid for vnl5050s5-e option conditions input drain status normal operation l h h l h h current limitation l h h x h h overtemperature l h h h h l undervoltage l h h h x x output voltage < v ol l h l l l h
docid15917 rev 6 15/33 VNL5050N3-E, vnl5050s5-e electrical characteristics 32 figure 15. switching characteristics figure 16. VNL5050N3-E application schematic 7 hfo * % u s u g u u u e po
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electrical characteristics VNL5050N3-E, vnl5050s5-e 16/33 docid15917 rev 6 figure 17. vnl5050s5-e application schematic '!0'#&4 96833/< 9 67$786 '5$,1 6285&( 5surw 5surw 5vxsso\ ,1387 9 5 / 9ff 0lfur&rqwuroohu n
docid15917 rev 6 17/33 VNL5050N3-E, vnl5050s5-e electrical characteristics 32 3.2 mcu i/o protection st suggests to insert a resistor (r prot ) in line to prevent the microcontroller i/o pins from latching up (a) . the value of these resistors is a compromise between the leakage current of microcontroller and the current required by the lsd i/os (input levels compatibility) with the latch-up limit of microcontroller i/os: equation 1 let: ? i latchup > 20 ma ? v ohc > 4.5 v ? 35 r prot 100 k then, the recommended value is r prot = 1 k figure 18 shows the turn-off current drawn during the demagnetization. a. in case of negative transient on the drain pin ( ) ? 7 0
electrical characteristics VNL5050N3-E, vnl5050s5-e 18/33 docid15917 rev 6 figure 18. maximum demagnetization energy 1. the voltage supply is v cc = 13.5 v ,$ /p+ 91/[ 0d[lpxpwxuqriifxuuhqwyhuvxvlqgxfwdqfh 91/[6lqjoh3xovh 5hshwlwlyhsxovh7mvwduw ?& 5hshwlwlyhsxovh7mvwduw ?& (>p-@ 7ghpdj>pv@ 91/[ 0d[lpxpwxuqrii(qhuj\yhuvxv7ghpdj 91/[6lqjoh3xovh 5hshwlwlyhsxovh7mvwduw ?& 5hshwlwlyhsxovh7mvwduw ?& ("1($'5
docid15917 rev 6 19/33 VNL5050N3-E, vnl5050s5-e package and pc board thermal data 32 4 package and pc board thermal data 4.1 sot-223 thermal data figure 19. sot-223 pc board 1. layout condition of r th and z th measurements (pcb fr4 area = 30 mm x 58 mm, pcb thickness = 2 mm, cu thickness = 35 m, copper areas: from minimum pad lay-out to 0.8 cm 2 ). figure 20. r thj-amb vs. pcb copper area in open box free air condition rthj_amb(c/w) rthjamb (c/w) 60 70 80 90 100 110 120 130 140 150 00.511.522.5 pcb cu heatsink area (cm 2 ) footprint rthj_amb(c/w) rthjamb (c/w) 60 70 80 90 100 110 120 130 140 150 00.511.522.5 pcb cu heatsink area (cm 2 ) footprint
package and pc board thermal data VNL5050N3-E, vnl5050s5-e 20/33 docid15917 rev 6 figure 21. sot-223 thermal impedance junction ambient single pulse equation 2: pulse calculation formula where = t p /t figure 22. thermal fitting model of a lsd in sot-223 1. the fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cyc ling during thermal shutdown) are not triggered. 0.1 1 10 100 1000 0.0001 0.001 0.01 0.1 1 10 100 1000 time (s) zth (c/w) cu footprint cu=2 cm2 z th r th z thtp 1 ? () + t =
docid15917 rev 6 21/33 VNL5050N3-E, vnl5050s5-e package and pc board thermal data 32 table 16. thermal parameters area/island (cm 2 ) footprint 2 r1 (c/w) 0.4 r2 (c/w) 0.8 r3 (c/w) 4.5 r4 (c/w) 24 r5 (c/w) 0.1 r6 (c/w) 115 45 c1 (w.s/c) 0.00006 c2 (w.s/c) 0.0005 c3 (w.s/c) 0.03 c4 (w.s/c) 0.16 c5 (w.s/c) 1000 c6 (w.s/c) 0.4 2
package and pc board thermal data VNL5050N3-E, vnl5050s5-e 22/33 docid15917 rev 6 4.2 so-8 thermal data figure 23. so-8 pc board 1. layout condition of r th and z th measurements (pcb fr4 area = 58 mm x 58 mm, pcb thickness = 2 mm, cu thickness = 35 m (front and back side), copper areas: from minimum pad lay-out to 2 cm 2 ). figure 24. r thj-amb vs. pcb copper area in open box free air condition rthj_amb(c/w) rthjamb (c/w) 65 75 85 95 105 00.511.522.5 pcb cu heatsink area (cm 2 ) footprint rthj_amb(c/w) rthjamb (c/w) 65 75 85 95 105 00.511.522.5 pcb cu heatsink area (cm 2 ) footprint
docid15917 rev 6 23/33 VNL5050N3-E, vnl5050s5-e package and pc board thermal data 32 figure 25. so-8 thermal impedance junction ambient single pulse equation 3: pulse calculation formula where = t p /t figure 26. thermal fitting model of a lsd in so-8 1. the fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cyc ling during thermal shutdown) are not triggered. 0.1 1 10 100 1000 0.0001 0.001 0.01 0.1 1 10 100 1000 time (s) zth (c/w) cu=footprint cu=2 cm2 z th r th z thtp 1 ? () + t =
package and pc board thermal data VNL5050N3-E, vnl5050s5-e 24/33 docid15917 rev 6 table 17. thermal parameters area/island (cm 2 ) footprint 2 r1 (c/w) 0.4 r2 (c/w) 2.4 r3 (c/w) 3.5 r4 (c/w) 21 r5 (c/w) 16 r6 (c/w) 58 28 c1 (w.s/c) 0.00008 c2 (w.s/c) 0.0016 c3 (w.s/c) 0.0075 c4 (w.s/c) 0.045 c5 (w.s/c) 0.35 c6 (w.s/c) 1.05 2
docid15917 rev 6 25/33 VNL5050N3-E, vnl5050s5-e package and packing information 32 5 package and packing information 5.1 ecopack ? in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 5.2 sot-223 mechanical data figure 27. sot-223 package dimensions 0046067
package and packing information VNL5050N3-E, vnl5050s5-e 26/33 docid15917 rev 6 table 18. sot-223 mechanical data dim. mm. inch min. typ. max. min. typ. max. a1.80.071 b 0.6 0.7 0.85 0.024 0.027 0.033 b1 2.9 3 3.15 0.114 0.118 0.124 c 0.24 0.26 0.35 0.009 0.01 0.014 d 6.3 6.5 6.7 0.248 0.256 0.264 e2.3 0.09 e1 4.6 0.181 e 3.3 3.5 3.7 0.13 0.138 0.146 h 6.7 7 7.3 0.264 0.276 0.287 v 10 (max) a1 0.02 0.1 0.0008 0.004
docid15917 rev 6 27/33 VNL5050N3-E, vnl5050s5-e package and packing information 32 5.3 so-8 mechanical data figure 28. so-8 package dimensions
package and packing information VNL5050N3-E, vnl5050s5-e 28/33 docid15917 rev 6 table 19. so-8 mechanical data symbol millimeters min. typ. max. a 1.75 a1 0.10 0.25 a2 1.25 b0.28 0.48 c0.17 0.23 d (1) 1. dimension d does not include mold flash, protrusions or gate burrs. mold flash, potrusions or gate burrs shall not exceed 0.15 mm in total (both side). 4.80 4.90 5.00 e 5.80 6.00 6.20 e1 (2) 2. dimension ?e1? does not include in terlead flash or protrusions. interl ead flash or protrusions shall not exceed 0.25 mm per side. 3.80 3.90 4.00 e1.27 h0.25 0.50 l0.40 1.27 l1 1.04 k0 8 ccc 0.10
docid15917 rev 6 29/33 VNL5050N3-E, vnl5050s5-e package and packing information 32 5.4 sot-223 packing information the devices can be packed in tube or tape and reel shipments (see the table 1: devices summary on page 1 ). figure 29. sot-223 tape and reel shipment (suffix ?tr?) reel dimensions base q.ty 1000 bulk q.ty 1000 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 12.4 n (min) 60 t (max) 18.4 tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 12 tape hole spacing p0 ( 0.1) 4 component spacing p 8 hole diameter d (+ 0.1/-0) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.05) 5.5 compartment depth k (max) 4.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed
package and packing information VNL5050N3-E, vnl5050s5-e 30/33 docid15917 rev 6 5.5 so-8 packing information figure 30. so-8 tube shipment (no suffix) figure 31. so-8 tape and reel shipment (suffix ?tr?) all dimensions are in mm. base q.ty 100 bulk q.ty 2000 tube length ( 0.5) 532 a 3.2 b 6 c ( 0.1) 0.6 c b a tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 12 tape hole spacing p0 ( 0.1) 4 component spacing p 8 hole diameter d (+ 0.1/-0) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.05) 5.5 compartment depth k (max) 4.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed reel dimensions all dimensions are in mm. base q.ty 2500 bulk q.ty 2500 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 12.4 n (min) 60 t (max) 18.4
docid15917 rev 6 31/33 VNL5050N3-E, vnl5050s5-e revision history 32 6 revision history table 20. document revision history date revision changes 9-jan-2008 1 initial release. 25-jun-2009 2 updated corporate template from v2 to v3 table 3: suggested connections for unused and n.c. pins ?v esd1 : updated parameter and value ?v esd2 : changed value table 4: absolute maximum ratings ?r thj-case : deleted max value for so-8 ?r thj-amb : added max value for both sot-223 and so-8 table 7: source drain diode ?v sd : added typ value table 8: input section. ?v icl : added min/max value for i s = 1 ma ?v inth: added min/max value table 9: status pin ?v stcl : added max value for i stat = 1 ma table 10: logic input ?v icl : added max value for i n = 1 ma table 12: supply section ?i s : changed unit of measurement for on-state. ?v vsl : added max value for i stat = 1 ma table 13: switching characteristics ?t d(off) : changed typ value both for sot-223 and so-8 ?w on : added typ value for so-8 ?w off : added typ value for so-8 ? added all typ column for sot-223 table 14: protection and diagnostics ?i liml : changed typ value ?t dliml : changed typ value ? deleted row t r valid for VNL5050N3-E option added figure 6: source diode forward characteristics added figure 7: static drain source on-resistance vs. drain current added figure 8: static drain source on-resistance vs. input voltage added figure 9: static drain source on-resistance vs. drain current added figure 10: transfer characteristics added figure 11: transfer characteristics (inside view for v in = 2 v to 3 v) added figure 12: output characteristics added figure 13: normalized on-resistance vs. temperature added chapter 4: package and pc board thermal data
revision history VNL5050N3-E, vnl5050s5-e 32/33 docid15917 rev 6 25-jun-2009 2 (continued) deleted table 25: sot-223 mechanical data & package outline added figure 27: sot-223 package dimensions added table 18: sot-223 mechanical data deleted table 26: so-8 mechanical data & package outline added figure 28: so-8 package dimensions added table 19: so-8 mechanical data 19-aug-2009 3 updated corporate template from v3 to v3-1 deleted row for r thj-case in table 5: thermal data 20-nov-2009 4 changed the document title took the first line off the bullet list for features on cover page table 4: absolute maximum ratings ?e as : added new row table 6: power mos section ?v supply : added new row ?r on : updated test conditions table 8: input section. ?i ss : updated test conditions ? updated the table footnote table 13: switching characteristics ? moved footnote 2 and changed its text ?w on : changed typ value ?w off : changed typ value table 14: protection and diagnostics ?i limh : updated test conditions ?i liml : updated test conditions ?t dliml : changed typ value updated figure 7: static drain source on-resistance vs. drain current updated figure 8: static drain source on-resistance vs. input voltage updated figure 9: static drain source on-resistance vs. drain current updated figure 10: transfer characteristics added figure 11: transfer characteristics (inside view for v in = 2 v to 3 v) updated figure 14: normalized input threshold vs. temperature added section 3.2: mcu i/o protection 19-sep-2013 5 updated disclaimer. 17-dec-2013 6 table 4: absolute maximum ratings : ?-i d : updated value table 8: input section. : ?i iss : updated value table 12: supply section : ?i s : updated value updated figure 16: VNL5050N3-E application schematic and figure 17: vnl5050s5-e application schematic updated section 3.2: mcu i/o protection table 20. document revision history (continued) date revision changes
docid15917 rev 6 33/33 VNL5050N3-E, vnl5050s5-e 33 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a particular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems with product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statem ents and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or register ed trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - swed en - switzerland - united kingdom - united states of america www.st.com

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